Recursive taylor series-based computation of numerical values for mathematical functions

ABSTRACT

A recursive method for computing numerical values for mathematical functions includes providing a recursive Taylor series representation of a mathematical function f(x) of a variable x evaluated around a given operating point a. The recursive Taylor series representation includes a plurality of derivative derived terms that include ratios of derivatives of f(x) evaluated at the operating point a. Coefficient data is determined from ones of the derivative derived terms stored in a tangible memory device evaluated at the operating point a over a predetermined range. An approximation for the mathematical function f(x) is computed using the recursive Taylor series representation evaluated with the coefficient data.

CROSS REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of Provisional Application Ser. No.61/311,017 entitled “A MULTIPLIER EFFICIENT METHOD FOR COMPUTING SQUAREROOT AND MAGNITUDE VALUES”, filed Mar. 5, 2010, which is hereinincorporated by reference in its entirety.

FIELD

Disclosed embodiments relate to recursive computation of numericalvalues for mathematical functions and computation devices includingintegrated circuits (ICs) that implement such computations.

BACKGROUND

As electronic signal processing systems become more complex, engineersare continually faced with tradeoffs between performance, power and area(PPA) when implementing the numerical algorithms needed for a givensystem implementation. In many of these systems (e.g., communicationsystems, imaging systems, control systems, etc.), there is generally aneed for more numerically efficient algorithms for computingmathematical values. If a given design involves fewer computations thananother design to achieve the same numerical performance (e.g.,accuracy), then such a design will require less area and power toproduce the same desired numerical value. As a result, a designsensitive to PPA is better than another design from a system designperspective.

A variety of methods are known for computing mathematical functions suchas magnitude and square root. For example, the cordic algorithm providesan iterative approach using a divide by two architecture. While thecordic algorithm can achieve N bits of precision in N iterations, thecordic algorithm is best suited for implementations that do not containa multiplier.

Another approach to approximate the numerical value of mathematicalfunctions is Newton-Raphson. The general mathematical representation ofthe Newton-Raphson approach for a mathematical function f(x) of avariable x is given by the following equation:

$\begin{matrix}{x_{n + 1} = {x_{n} - \frac{g\left( x_{n} \right)}{g^{\prime}\left( x_{n} \right)}}} & (1)\end{matrix}$where g(x)=f(x)+b. For the Newton-Raphson approach, the derivative ofthe function f(x) must exist and have a finite value throughout theregion of interest. Otherwise, the iterative approach will diverge fromthe desired result. The convergence of the Newton-Raphson method isquadratic in nature. That is, the number of accurate bits in thecomputation result roughly doubles for each iteration of the algorithm,assuming that the initial guess, x₀, is close to the actual numericalresult.

Another approach to approximate the numerical value of mathematicalfunctions is the Taylor series. In mathematics, the Taylor series isknown to be a representation of a function f(x) as an infinite sum ofterms calculated from the values of its derivatives evaluated at aparticular single point/value generally represented by an operatingpoint a. The general mathematical representation of a Taylor seriesapproximation for the numerical value of f(x) near an operating point ais given by the following equation:

$\begin{matrix}{{f(x)} \approx {\sum\limits_{n = 0}^{\infty}{\frac{f^{(n)}(a)}{n!}\left( {x - a} \right)^{n}}}} & (2)\end{matrix}$where f^((n))(a) denotes the n^(th) derivative of the function f(x)evaluated at the operating point a. In a practical application, theinfinite sum in (2) is replaced with a finite sum of N terms as given bythe following equation:

$\begin{matrix}{{f(x)} \approx {\sum\limits_{n = 0}^{N - 1}{\frac{f^{(n)}(a)}{n!}\left( {x - a} \right)^{n}}}} & (3)\end{matrix}$The accuracy of the numerical result can be determined directly from thenumber of terms N in the Taylor series approximation. That is, the boundfor the error (e) can be written as:

$\begin{matrix}{e = {{{{f(x)} - {\hat{f}(x)}}} \leq {\frac{f^{(N)}}{N!}\left( {x - a} \right)^{N}}}} & (4)\end{matrix}$for an N term approximation. As a result, the number of terms needed fora given direct Taylor series design implementation will be determined bythe numerical accuracy requirements of the system implementation. Forreference, a conventional direct Taylor series implementation requiresN*(N−1)/2 multiplications for an N term approximation.

SUMMARY

Disclosed embodiments provide recursive Taylor series-based methods forcomputing numerical values for mathematical functions that are much morecomputationally efficient compared to existing computation methods forthe case when the computational architecture involves multipliers. Arecursive method for computing numerical values for mathematicalfunctions includes providing a recursive Taylor series representation ofa mathematical function f(x) of a variable x evaluated around a givenoperating point a. The recursive Taylor series representation includes aplurality of derivative derived terms that include ratios of derivativesof f(x) at the operating point a. Coefficient data is determined fromones of the derivative derived terms stored in a tangible memory deviceevaluated at the operating point a over a predetermined range. Anapproximation for the mathematical function f(x) is computed using therecursive Taylor series representation evaluated with the coefficientdata. Digital signal processor (DSP) integrated circuits (ICs) forcomputing numerical values for mathematical functions using disclosedrecursive Taylor series-based algorithms are also disclosed.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a flow chart for a recursive Taylor series-based method forcomputing numerical values for mathematical functions, according to anexample embodiment.

FIG. 2 is a simplified block diagram of a DSP IC that a implements arecursive Taylor series-based method for computing numerical values formathematical functions, according to an example embodiment.

FIG. 3 is a functional block diagram of an example overall C6474 DSPmulticore chip from Texas Instruments Incorporated (Dallas, Tex.).

FIG. 4 is a block diagram of the architecture for a given C64+ DSP corein the C6474 chip shown in FIG. 3 showing data paths.

FIG. 5 is a listing of software pipeline information that can be run onthe C6474 DSP chip for implementing an example square root function,according to an example embodiment.

FIG. 6 is a listing of software pipeline information that can be run onthe C6474 DSP chip for implementing an example magnitude function forcomplex data values, according to an example embodiment.

DETAILED DESCRIPTION

Example embodiments are described with reference to the drawings,wherein like reference numerals are used to designate similar orequivalent elements. Illustrated ordering of acts or events should notbe considered as limiting, as some acts or events may occur in differentorder and/or concurrently with other acts or events. Furthermore, someillustrated acts or events may not be required to implement amethodology in accordance with this disclosure.

As described above, a problem with the conventional directimplementation of the Taylor series approximation (equation 3) is thatthe multiplier count needed is too high for many applications, whichresults in the design requiring too large an area, and as a result, toomuch power to produce the desired numerical accuracy. For manytranscendental functions and all algebraic functions, disclosedembodiments recognize that the Taylor series approximation for amathematical function f(x) of a variable x around an operating point acan be represented as a recursive equation in the following form:f(x)≈d_(N−1)(1+d_(N−2)(1+d_(N−3)(1+d_(N−4)(1+ . . . +d₁(1+d₀)))))  (5)where

$\begin{matrix}{d_{i} = \left\{ \begin{matrix}{\frac{1}{N - i - 1}\left( \frac{f^{({N - i - 1})}(a)}{f^{({N - i - 2})}(a)} \right)\left( {x - a} \right)} & {{{for}\mspace{14mu} 0} \leq i \leq {N - 2}} \\{f(a)} & {{{for}\mspace{14mu} i} = {N - 1}}\end{matrix} \right.} & (6)\end{matrix}$For the recursive equation given by equation 5 above, there is astarting value d₀ based on the derivatives of f(x) evaluated at a. Eachnew term is generated by adding one and then multiplying by d_(i) Thefollowing iterative form can be realized for a N term approximation:

y₀ = d₀ y₁ = d₁(1 + y₀) y₂ = d₂(1 + y₁)      ⋮y_(N − 2) = d_(N − 2)(1 + y_(n − 3))y_(N − 1) = d_(N − 1)(1 + y_(n − 2))It is noted that this implementation requires only 2*(N−1)multiplications for an N term approximation for the numerical value ofthe mathematical function f(x) around a. Accordingly, the architectureto implement this recursive Taylor series algorithm representation (5,6) provides a significant reduction in the number of multipliers ascompared to the direct Taylor series implementation for the same numberof terms (N) in the approximation. For example, for a 10 (N=10) termapproximation, the number of multiplications using known equation (3)for the direct Taylor series implementation is 45 (calculated fromN*(N−1)/2)), while the disclosed Taylor series algorithm representation(5, 6) is much more computationally efficient as it reduces the numberof multiplications to 18 (calculated from 2*(N−1)). The above-describedrecursive design is the foundation for disclosed algorithms that can beused to compute mathematical values for various functions, such as themagnitude of complex data values and the value of square roots around agiven operating point a.

To improve the convergence properties of the design, that is the abilityof the method to converge to the desired level of accuracy in the fewestnumber of iterations, lookup tables (e.g., stored in non-volatilememory) can be used to store the f^((i))(a)/f^((i+1))(a) (the“derivative derived terms”) in equation (6) for values of operatingpoint a over a range of a values of interest. In general, the range ofinterest depends upon the particular function f(x) for which theapproximation is being made. In general, the range of interest isdetermined by dividing the range of values x into a finite number ofregions, each region denoted by its operation point a. In oneembodiment, the recursive Taylor series algorithm (5, 6) can be used togenerate another algorithm to approximate the mathematical value of asquare root function. Disclosed approximation algorithms for a squareroot function using 5, 6 can include from two (2; N=2) terms to tens ofterms (e.g., N=20), generally 2 to 8 terms, depending on the desiredlevel of accuracy.

Consider an example four (4) term (N=4) approximation for the squareroot function as given by the algorithm (7) shown below. Disclosedembodiments recognize that algorithm 7 can be generated by simplifyingthe recursive Taylor series algorithm (5, 6) for certain functions(i.e., using (6) generates d₃=a^(1/2), d₂=½(a⁻¹)(x−a) since thederivative with respect to x of x^(1/2) is ½x^(−1/2) and½^(−1/2)/x^(1/2)=½(x⁻¹), d₁=−¼(a⁻¹)(x−a), and d₀=−½(a⁻¹)(x−a)):

$\begin{matrix}{{f(x)} = {\sqrt{x} \approx {a^{1/2}\left( {1 + {\frac{1}{2}{a^{- 1}\left( {x - a} \right)}\left( {1 - {\frac{1}{4}{a^{- 1}\left( {x - a} \right)}\left( {1 - {\frac{1}{2}{a^{- 1}\left( {x - a} \right)}}} \right)}} \right)}} \right)}}} & (7)\end{matrix}$It is noted that approximation algorithm (7) for computing the squareroot of a function includes only a^(1/2) and a⁻¹ powers (thus only 2different powers) for the derivative derived terms. This low number ofdifferent powers for the derivative derived terms with respect to thenumber of terms (N) in the approximation algorithm enables significantcomputational and memory access efficiency. For example, not as manymultiplications are needed to compute the coefficients since there arereally only two unique coefficients in Equation (7), namely a^(1/2) anda⁻¹.

Since the number of unique coefficients is only two, they can be storedin registers such as DSP registers in the case of a DSP implementation,which reduces the memory access bandwidth needed to load coefficientsfrom memory. It is expected that functions besides the square root mayalso provide a reduced number of actual coefficients with respect to thenumber of terms (N) in the approximation algorithm due to themathematical simplifications produced by the ratio of derivative termsto thus provide analogous computational efficiency.

Tables, such as stored in suitable tangible memory (e.g., a non-volatilememory), can be used to store the a^(1/2) and a^(−1/2) values for thederivative derived terms for implementing approximation algorithm (7).Notice that a^(1/2) and a^(−1/2) values can be stored since they are thefundamental values needed in Equation (7) after the a^(1/2) term isdistributed through the equation. Also note that a⁻¹=a^(−1/2)*a^(−1/2).

One design question becomes how many values should be in the a table andhow should the table values in the table be referenced. For a new andcomputationally efficient answer to this design question, disclosedembodiments include partitioning an argument of the derivative derivedterms comprising the operating point a to divide the x value into atleast two (2) portions. Consider the following partitionedrepresentation for an x value:x=x _(H)·2^(2L) +x _(L)  (8)where x_(L), is the lower portion of the x value and x_(H)/is the higherportion of the x value. It is noted that the lower portion x_(L),occupies the lower 2*L bits of the x value. Using the x valuepartitioning shown in Equation (8), the operating point (i.e. the avalue) can be written as:a=x _(H)·2^(2L)  (9)

It can be seen that that the 2^(2L) term in (9) is just a power of 2scaling and thus can be left out of the table (e.g., a look-up table)since L is a known integer value (i.e. it can be determined from the xvalue and the number of values in the table). Thus, the table values forthe square root function for storing a^(1/2) and a^(−1/2) values cancontain values that only represent √{square root over (x_(H))} and1/√{square root over (x_(H))}. For example, if the x value occupies Mbits, then the table should contain 2^(M−2L) values to cover the entirerange of possible x_(H) values. In one particular embodiment, for 32 bitdata (i.e. M=32) and a value of L=12, the table contains 2³²⁻²⁴=2⁸=256values to cover the entire range of possible x_(H) values.

The bit representation of the x value given in Equation (8) is new andbeneficial for disclosed designs because it forces the lower portion ofthe x value x_(L) to be an even number of bits. The lower portion x_(L)being an even number of bits makes the square root of Equation (9) be anexact power of two (e.g. √{square root over (x_(H))}*2^(L)), whichimproves the implementation efficiency in computational devices that usebase 2 arithmetic for computations, such as digital signal processors(DSPs), field programmable gate arrays (FPGAs), and application specificintegrated circuits (ASICs). Otherwise, an offset term would be added tothe result for situations when the number of bits in the lower portionx_(L) is odd.

The square root function shown in approximation algorithm (7) or avariant thereof (i.e., different number of M terms) can also be used tocompute other functions, such as the magnitude of complex data values inthe following manner. A complex data value y can be written as a realportion and an imaginary portion as follows:y=y _(r) +j·y _(i)  (10)where y_(r) is the real portion of the complex data value, y_(i) is theimaginary portion of the complex data value, and j=√{square root over(−1)}. To compute the magnitude of a complex data value y, the followingvalue of x can be used in the square root approximation algorithm (7)disclosed above since the square root of a squared function is thefunction itself:x=y _(r) ² +y _(i) ²  (11)Thus, the disclosed square root approximation algorithm (7) can also beused to compute the magnitude of complex data values as well.

FIG. 1 is a flow chart for a recursive method 100 for computing valuesfor mathematical functions, according to an example embodiment. Step 101comprises providing a recursive Taylor series representation of amathematical function (f(x)) of a variable x around a given operatingpoint a, wherein the recursive Taylor series representation includes aplurality of derivative derived terms that include ratios of derivativesof the mathematical function evaluated at the operating point a. Themathematical function f(x) can be a square root in one embodiment, ormagnitude function x=y_(r) ²+y_(i) ² where y is a complex data value inanother embodiment.

Step 102 comprises determining coefficient data comprising ones of theplurality of derivative derived terms evaluated at the operating point aover a predetermined range, wherein the plurality of derivative derivedterms are stored in a tangible memory device (e.g., ROM), such as in alook-up table.

In step 103 an approximation is computed for the mathematical functionusing the recursive Taylor series representation evaluated with thecoefficient data. The computing can be implemented with a computationalarchitecture that includes a plurality of multipliers, such as a DSP,FPGA or ASIC.

As described above, the method can further comprise partitioning anargument of the derivative derived terms comprising the operating pointa to divide the x value into at least a lower bit portion x_(L), and ahigher bit portion x_(H), so that a=x_(H)·2^(2L), wherein the lower bitportions 2^(2L) have an even number of bits, and wherein the pluralityof derivative derived terms are stored in a table in the tangible memorydevice with only their higher bit portions x_(H).

FIG. 2 is a simplified block diagram of a DSP IC (chip) 200 that employsa recursive Taylor series representation for computing values formathematical functions, according to an example embodiment. DSP IC 200is shown formed on a substrate 210 having a semiconductor top surface(e.g., a silicon substrate) and comprises a volatile memory (e.g.,random access memory (RAM)) 225 and a non-volatile memory (e.g., readonly memory (ROM)) 230. Disclosed algorithms and the plurality ofderivative derived terms that are a function of a can be stored innon-volatile memory 230.

The DSP IC 200 is also shown including interface port(s) 240 for inputsand outputs, counter/timers 245, memory controller 250 and bus 255. DSPIC 200 includes a multiply-accumulate (MAC) unit 220 comprising aplurality of multipliers that is operable to compute a value for amathematical function f(x) using the recursive Taylor seriesrepresentation evaluated with coefficient data comprising ones of theplurality of derivative derived terms evaluated the operating point aover a predetermined range.

For example, DSP IC 200 can implement approximation algorithm 7 thatrepresents a square root function f(x) as a recursive Taylor seriesaround a given operating point a, generate coefficient data comprisingones of the plurality of derivative derived terms evaluated theoperating point a over a predetermined range, where the respectivederivative derived terms can be stored in the non-volatile memory 230with only their higher bit portions based on the partitioning anargument of the derivative derived terms comprising the operating pointa described above.

As with conventional DSPs, DSP IC 200 can execute instructions toimplement one or more digital signal processing algorithms or processes.For instance, the instructions data can include various coefficients andinstructions that, when loaded and initialized into DSP IC 200, canprompt the DSP IC 200 to implement different computations for differentfunctions. For example, DSP IC 200 can receive the derivative derivedterms stored as a look-up table in non-volatile memory 230, anddetermine coefficient data comprising ones of the plurality ofderivative derived terms evaluated at the operating point a over apredetermined range in memory, where the processor can determine thetable data to retrieve based on the x_(h) value. Approximation algorithm7 can then be applied using the coefficient data to compute amathematical value for the function in real-time.

The performance of disclosed embodiments was tested based on animplementation of the square root algorithm (approximation algorithm(7)) realized in software targeted for the Texas Instruments (TI) DSPC6474 architecture as compared to existing software implementations.FIG. 3 is a block diagram of an example overall C6474 DSP chip 300 fromTexas Instruments Incorporated (Dallas, Tex.) that was used for thetesting. The C6474 DSP chip 300 includes eight functional units thatreside in two data paths (A and B) as shown in the block diagram of thearch for a given core in FIG. 4. Each data path contains four functionalunits (L, S, M, and D) and 32, 32-bit general-purpose registers. Moredetails about the architecture, instructions and mapping of instructionsto functional units can be found in TMS320C64x/C64x+ DSP CPU andInstruction Set Reference Guide, Texas Instruments, Literature Number:SPRU732G, February 2008. Unless otherwise noted, every unit produces aresult at each clock cycle when pipelined perfectly.

FIG. 4 is a block diagram of the arch for a given C64+ DSP core 400 inthe C6474 chip 300 of FIG. 3 showing data paths. The DSP core 400 can beseen to include a plurality of separate redundant data paths forcomputing the approximation for f(x), shown as data path A and data pathB. The data paths are not completely orthogonal. Cross paths between Aand B side registers are also present for improved data throughputefficiency.

FIG. 5 is a listing of software pipeline information for a implementingan example square root function. The cycle count requirements for thefour functional units on the data path A and B sides are provided aswell as loop dependency information. The disclosed design fordetermining the square root of a function using approximation algorithm(7) along with bit partitioning based on (9) was found to take 8.25cycles to compute each square root value, since it takes 17 total cyclesand the DSP chip had a loop unrolling factor of 2. It is noted that thisarchitecture is not multiplier limited (M unit), but is instead shiftlimited (S unit) using a disclosed design.

FIG. 6 is a listing of software pipeline information for implementing anexample magnitude function for complex data values. The cycle countrequirements for the four functional units on the A and B sides areprovided as well as loop dependency information. Since the square rootimplementation used for the magnitude function was not multiplierlimited, the architecture for the magnitude computation was found totake just 8.25 cycles per value as well.

The previous approach running on the C64+ DSP architecture for computingthe square root and magnitude of complex data values, which was based ona Newton-Raphson approach, took 11.1 cycles per value and 12.6 cyclesper value, respectively. The results using a disclosed square rootalgorithm embodiment represent almost a 30% improvement in cycles pervalue. For electronic signal processing systems that are dominated withmagnitude or square root computations, this is a significantimprovement.

Benefits of disclosed recursive algorithms and devices implementing suchrecursive algorithms include improved performance over existingapproximation methods for computing mathematical functions, including areduced number of multiplications for a Taylor series approximation forfunctions including square root and magnitude functions with the samenumber of terms and thus the same numerical accuracy as alternativenumerical algorithms. Disclosed embodiments also provide an improvedtable design that requires less computation cycles to load thecoefficients and compute the effective table values. Fewer computationcycles corresponds to improved PPA over existing methods. Disclosedembodiments are applicable to both fixed point and floating pointarchitectures. Moreover, although generally described as being realizedusing a DSP, disclosed embodiments can also be used to enable efficientFPGA and ASIC designs where multipliers are used for the computations.

Exemplary applications for disclosed embodiments include electronicsignal processing systems including communication systems, imagingsystems including medical imaging (e.g., ultrasound) systems, controlsystems, Global Positioning Systems (GPSs), satellite systems, trackingsystems and other systems involving square root and magnitudecomputations.

Those skilled in the art to which this disclosure relates willappreciate that many other embodiments and variations of embodiments arepossible within the scope of the claimed invention, and furtheradditions, deletions, substitutions and modifications may be made to thedescribed embodiments without departing from the scope of thisdisclosure.

I claim:
 1. A recursive method for computing numerical values formathematical functions, comprising: providing a recursive Taylor seriesrepresentation of a mathematical function f(x) of a variable x around agiven operating point a, wherein said recursive Taylor seriesrepresentation includes a plurality of derivative derived terms thatinclude ratios of derivatives of said mathematical function evaluated atsaid operating point a; determining coefficient data comprising ones ofsaid plurality of derivative derived terms evaluated at said operatingpoint a over a predetermined range, wherein said plurality of derivativederived terms are stored in a tangible memory device, and computing anapproximation for said mathematical function f(x) using said recursiveTaylor series representation evaluated with said coefficient data,wherein said computing is implemented with a computational architecturethat includes a plurality of multipliers.
 2. The method of claim 1,wherein said plurality of derivative derived terms are stored as alook-up table in said tangible memory device.
 3. The method of claim 2,further comprising partitioning an argument of said plurality ofderivative derived terms comprising said operating point a into at leasta lower bit portion and a higher bit portion x_(H), so that saida=x_(H)·2^(2L), wherein said lower bit portions 2^(2L) have an evennumber of bits, and wherein said plurality of derivative derived termsare stored in said look-up table in said tangible memory device withonly said higher bit portions x_(H), and wherein said L is a knowninteger value.
 4. The method of claim 3, wherein table values in saidlook-up table are for said mathematical function f(x) being a squareroot function (x^(1/2)) or x=y_(r) ²+y_(i) ² where y is a complex datavalue, and wherein said look-up table stores said plurality ofderivative derived terms as a^(1/2) and a^(−1/2) values that containvalues that only represent √{square root over (X_(H))} and 1/√{squareroot over (x_(H))}.
 5. The method of claim 1, wherein said computationalarchitecture that includes said plurality of multipliers comprises adigital signal processor.
 6. The method of claim 1, wherein saidrecursive Taylor series for said mathematical function f(x) is derivedfrom a function in the following form: whereƒ(x)≈d_(N−1)(1+d_(N−2)(1+d_(N−3)(1+d_(N−4)(1+. . . +d₁(1+d₀)))))$d_{i} = \left\{ \begin{matrix}{\frac{1}{N - i - 1}\left( \frac{f^{({N - i - 1})}(a)}{f^{({N - i - 2})}(a)} \right)\left( {x - a} \right)} & {{{for}\mspace{14mu} 0} \leq i \leq {N - 2}} \\{f(a)} & {{{for}\mspace{14mu} i} = {N - 1}}\end{matrix} \right.$ where f^((i))(a) terms represent derivates of fwith respect to x evaluated at said operating point a.
 7. A digitalsignal processor (DSP) IC for computing numerical values formathematical functions, comprising: a substrate having a semiconductorsurface; a memory device including a stored recursive Taylor seriesrepresentation for a mathematical function f(x) of a variable x around agiven operating point a that includes a plurality of derivative derivedterms that include ratios of derivatives of said mathematical functionevaluated at said operating point a; a multiply-accumulate (MAC) unitcomprising a plurality of multipliers formed on said semiconductorsurface coupled to said memory that is operable to (i) determinecoefficient data comprising ones of said plurality of derivative derivedterms evaluated at said operating point a over a predetermined range,and to (ii) compute an approximation for said mathematical function f(x)using said recursive Taylor series representation evaluated with saidcoefficient data.
 8. The DSP IC of claim 7, wherein said memory devicecomprises non-volatile memory.
 9. The DSP IC of claim 8, whereinarguments of said plurality of derivative derived terms comprising saidoperating point a are partitioned into at least a lower bit portion anda higher bit portion x_(H), so that said a=X_(H)·2^(2L), wherein saidlower bit portions 2^(2L) have an even number of bits, and wherein saidplurality of derivative derived terms are stored in a look-up table insaid memory device with only said higher bit portions x_(H).
 10. The DSPIC of claim 9, wherein table values in said look-up table are for saidmathematical function f(x) being a square root function (x^(1/2)) orx=y_(r) ²+y_(i) ² where y is a complex data value, and wherein saidlook-up table stores said plurality of derivative derived terms asa^(1/2) and a^(−1/2) values that contain values that only represent√{square root over (X_(H))} and 1/√{square root over (x_(H))}.
 11. TheDSP IC of claim 7, wherein said DSP includes a plurality of separateredundant data paths for computing said approximation for saidmathematical function f(x).